Sample-and-hold circuits using such storage capacitors are employed, for example, in analog/digital converters of a pulse-code-modulation (PCM) telephone system in which subscriber lines are sampled during respective time slots and the resulting voice samples are transmitted to the capacitor for temporary storage. Toward the end of each time slot, the capacitor must be discharged before receiving the next voice sample.
Conventional discharge circuits comprise an electronic gate, such as a transistor generally in series with a protective diode, which in its conductive state substantially short-circuits the capacitor. Even when fully saturated, such a transistor has an internal resistance which increases significantly when their emitter/collector voltage drops below a certain threshold. The protective diode usually associated with the transistor also has such a nonlinear forward resistance. As a result, the capacitor retains a not insignificant residual charge at the end of the limited resetting interval during which the gate conducts, thereby giving rise to undesirable cross-talk between subscribers in adjoining time slots.
The dissipation of a capacitor charge can, of course, be accelerated by using several parallel-connected transistors in the associated discharge gate. This, however, increases the cost of manufacture and maintenance while also giving rise to problems of synchronization to insure the simultaneous saturation of all transistors.